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Silicon University / Pillar 06 · Plasma Etching & Atomic-Scale Material Removal / Topic 6.3 · High-Aspect-Ratio Plasma Etching

Tier 2 · Equipment & Kinematics 18 min read

HAR Etcher Hardware: Cryogenic Sub-Zero Cooling & High-Voltage Pulsed Bias

Tool design for Deep Reactive Ion Etching (DRIE), focusing on high-speed directional gas switching valves for the Bosch process (SF_6 etch / C_4F_8 passivation) and ultra-low temperature cryogenic chucks (-100^C).

Equipment EngineersYield SpecialistsHardware Architects

01Advanced Hardware Demands for Deep Feature Etching

To overcome transport blockades and etch through deep 3D NAND channel holes or deep silicon TSVs, conventional RIE tool designs are insufficient. Fabs rely on specialized High-Aspect-Ratio (HAR) Etch Platforms incorporating two transformative hardware technologies:

Process schematicSchematic · source diagram
EXTREME CRYOGENIC CHUCK COOLING(-60°C to -80°C Sub-Zero Wafer Temp)HIGHOLTAGE PULSED RF BIAS SYSTEMS(Peak Bias Voltages Exceeding 10-15 kV)

02Cryogenic Sub-Zero Wafer Cooling Mechanics

In standard dielectric etching, wafer temperatures are maintained between and . However, at these temperatures, fluorocarbon polymer passivation films on trench sidewalls desorb or erode rapidly under continuous ion exposure, causing severe trench bowing (widening of the upper trench).

Process schematicSchematic · source diagram
STANDARD TEMP ETCH (20°C to 60°C)CRYOGENIC ETCH (-60°C to -80°C)Fast Polymer DesorptionCondensed Frozen Passivation LayerSidewall BowingStraight VerticalSidewalls

Cryogenic Advantages

  • Ultra-Thin Condensed Passivation: Cooling the wafer to or using specialized liquid nitrogen or fluorinert chiller units allows fluorine-based passivation species () to condense into a robust, ultra-thin protective film along vertical sidewalls.
  • Radical Suppression: Spontaneous isotropic chemical etching on sidewalls is thermally frozen out, enabling purely ion-driven vertical removal at the trench bottom.
Figure 1
FIG. 1

03High-Voltage Pulsed RF Power & Bias Waveform Shaping

To drive positive ions down an deep trench without significant angular deflection, ions require extreme directional kinetic energy. Modern HAR etchers utilize high-power bias generators capable of delivering peak RF voltages exceeding to .

Synchronized Pulsed Rf Bias WaveformSchematic · source diagram
Bias Voltage (kV)15 k0 kTime (us)State-ONState-OFF (Charge Dissipation)

Synchronized Bias Pulsing

  • State-ON (High Bias Voltage): Accelerates ions vertically with high momentum, enabling them to punch through charge barriers and reach the deep trench bottom.
  • State-OFF (Zero Bias): Allows accumulated positive electrostatic surface charge at the trench bottom to dissipate via low-energy electron arrival, eliminating notching and twisting defects.
Figure 2
FIG. 2

04The Bosch Process for Deep Silicon TSV Etching

For deep Through-Silicon Vias ( wide silicon features), tools utilize the specialized Bosch Deep Reactive Ion Etching (DRIE) pulsed process:

Cycle Step 1: Passivation (C4F8 Plasma) ---> DepositsSchematic · source diagram
Cycle Step 1: Passivation (C4F8 Plasma)Deposits Teflon-like film on all surfacesCycle Step 2: Etch (SF6 Plasma + Bias)Sputters bottom polymer, etches Si verticallyRepeat 500-1000 CyclesProduces deep TSV with scalloped sidewalls
Figure 3
FIG. 3

→Prerequisites & continue reading

Prerequisites: ["p06-t6.3-t1-high-aspect-ratio-har-etching-fundamentals"]

Also in Topic 6.3, High-Aspect-Ratio Plasma Etching:

Tier 1 · High-Aspect-Ratio (HAR) Plasma Etching: Core Princip…Tier 3 · Deep-Trench Ion Transport, ARDE Modeling, Striation …