Silicon UniversitySEMICONDUCTOR MANUFACTURING About the project
Fab Flow
  1. 101 Quartzite
  2. 102 Ingot
  3. 103 Wafering
  4. 104 FEOL
  5. 105 Step 22
  6. 106 Packaging

Silicon University / Track A / Pillar 08 · BEOL & Packaging

22

BEOL Metallization, Dual Damascene & Low-k

Step 22 of 24 · BEOL Metallization, Advanced 2.5D/3D Packaging & Heterogeneous Integration · three tiers, 55 min total.

BEOL phase Topic 8.1 3 articles
Tier 1 · Core FundamentalsBEOL Metallization, Dual-Damascene & Low-k Dielectrics: Core Fundamentals

Explains how billions of microscopic transistors on a chip are connected together using up to 15 layers of copper wires embedded inside fragile porous low-k insulating ma…

12 min read
Tier 2 · Equipment & KinematicsCopper Electroplating, PVD Barrier & Pore Sealing Mechanics

Tool design for magnetron sputtering of TaN/Ta liner and Cu seed layers, fountain-head Electrochemical Deposition (ECD) cells with organic additives (suppressors, acceler…

18 min read
Tier 3 · Deep-Dive & Yield EngineeringElectromigration, RC Delay & Ultra-Low-k Physics

Chemical analysis of carbon-doped oxide (SiCOH) plasma damage during etching, dielectric constant (k) degradation, copper electromigration (EM) grain boundary diffusion p…

25 min read